A fine line width has been implemented through exposure in order to implement a highly integrated semiconductor circuit, but the line width that can be implemented is limited due to a diffraction limit.
In order to overcome this, a method of reducing a diffraction limit using a light having a shorter wavelength than a visible light, such as extreme ultraviolet (EUV), and a 3D semiconductor packaging process of vertically stacking a number of wafer chips subjected to a process to increase an degree of integration have been proposed.
In the 3D semiconductor packing process in which a number of wafer chips are vertically stacked, circuits of respective wafer layers should be electrically connected to constitute circuits that send and receive electrical signals between a number of stacked wafer chips. For electrical connection between the wafer layers, elongate holes (hereinafter referred to as “via holes”) called through silicon vias (TSVs) are formed in the silicon wafer and the via holes are filled with a conductive material to connect the circuits between the wafer layers. Currently, a TSV process can be implemented, for example, through deep etching.
Such a via hole has a structure in which a diameter is small and a depth is large as described above, i.e., an aspect ratio is great. Accordingly, it is difficult to confirm whether a formed via hole is successfully formed to have a desired predetermined depth and diameter.
Via holes should be formed to have the same depth and diameter on one wafer. If the wafer chip is stacked on another wafer chip after grinding when the via holes are formed with different diameters or depths, some circuits may not be electrically connected and a product defect may be caused. Accordingly, inspecting whether the via holes formed in the wafer are formed with a predetermined depth and diameter is an important process in a process of fabricating a 3D semiconductor package.
As a conventional method of inspecting a depth and a diameter of the via hole of the silicon wafer, there are an optical measurement method of irradiating a light to a wafer surface in which via holes are formed to measure the depth and the diameter, a method of cutting a cross-section of a wafer in which via holes are formed and performing inspection using a scanning electron microscope (SEM), and the like. In the conventional optical measurement method, in the case of a measurement method using a confocal microscope, it is difficult to make accurate depth decision due to a great depth measurement error caused by diffuse reflection at a side surface of the via hole and a bottom surface, and in the case of a measurement method using a white-light scanning interferometer, it is difficult to accurately measure the depth of the via hole due to a light not reaching the bottom surface of the via hole by a high aspect ratio of a measurement specimen or due to a diffraction phenomenon occurring at a via hole entrance.
The method using a scanning electron microscope (SEM) has a drawback in that it damages a specimen, and accordingly cannot be used for total wafer inspection in a semiconductor packaging process.